Lauterbach supports Arm® CoreSight Wire Protocol

Hoehenkirchen, Germany—April 10, 2024 — With support for Ambarella's CV3 family, a high-end SoC for autonomous driving up to Level 4, Lauterbach introduces the first debug and trace solution for Arm's CoreSight Wire Protocol (CSWP). It uses existing functional interfaces such as USB, Ethernet, or PCIe, as an alternative to using the traditional JTAG and Serial Wire Debug interfaces.

Customers using Ambarella's CV3 SoCs can now run Lauterbach's TRACE32® PowerView debug and trace software over the chips' USB 3 interface using the CSWP protocol, a standardized transport protocol, which is agnostic of the physical link. By implementing Arms CoreSight SoC-600 IP the SoCs can leverage access standards to debug memory space and an enhanced embedded trace router (ETR) that supports high-bandwidth streaming trace mode, which can be used to offload trace data across functional interfaces. 

Lauterbach’s TRACE32® allows developers to debug and trace all cores over a USB 3 interface and CSWP. With synchronization of both break-points and run-time control, they have dominion over the entire system. Communication between the CV3 SoC and Lauterbach's PowerView software is controlled by an Arm® Cortex™-M3 CPU implemented on the chip, which runs the USB stack as well as the CSWP server. 

“As a technology leader in development tools for embedded systems, it was natural for us to support CSWP debugging from the very beginning.” says Norbert Weiss, Managing Director of Lauterbach GmbH. “Ambarella's CV3 SoC family has all the chip-side prerequisites to enable customers to use our leading-edge debug and trace features without restrictions.”

Ambarella’s ASIL D-compliant CV3 domain controller system on chip (SoC) provides industry-leading AI performance per watt for NN computation, up to 16 Arm® Cortex®-A78AE CPUs, and an automotive GPU, in a single SoC. Fabricated in an advanced 5 nm process technology, the CV3 is an ideal platform for implementing autonomous driving for vehicles from L2+ to L4, single- and multi-camera ADAS, DMS, and in-cabin solutions, single- and multi-channel electronic mirrors with BSD, and intelligent parking assistance systems. 

Lauterbach will be demonstrating debugging the CV3 SoC via CSWP in practice at its booth 4-210 at embedded world, all further information on the trade fair highlights can be found here.

More details about TRACE32® USB debugging you can find here: https://www.lauterbach.com/products/software/debugging-via-usb